Crypto SIG PoW

Crypto SIG PoW

Proposer

Name: Andrew Dellow, adellow@qti.qualcomm.com

Organization/Affiliation: Qualcomm

Introduction

We want to move Crypto from a TG to new Crypto SIG, to align with RVI policies. The original Crypto TG charter is shown for context, this TG will be closed.

The new Crypto SIG Charter then follows.

Old TG Charter

The Cryptographic Extensions Task Group will propose ISA extensions to the vector extensions for the standardized and secure execution of popular cryptography algorithms.  To ensure that processor implementers are able to support a wide range of performance and security levels the committee will create a base and an extended specification. The base will be comprised of low-cost instructions that are useful for the acceleration of common algorithms. The extended specification will include greater functionality, reserve encodings for more algorithms, and will facilitate improved security of execution and higher performance. The scope will include symmetric and asymmetric cryptographic algorithms and related primitives such as message digests.  The committee will also make ISA extension proposals for lightweight scalar instructions for 32 and 64 bit machines that improve the performance and reduce the code size required for software execution of common algorithms like AES and SHA and lightweight algorithms like PRESENT and GOST, as well as ISA proposals regarding the use of random bits and secure key management.

New Crypto SIG Charter

Cryptography is one of the foundations of secure and trusted system. The Cryptography SIG will monitor and examine developments in cryptography and their implications to RISC-V on an ongoing basis, and define the strategy for robust, performant cryptography within RISC-V.

Objectives

  • Monitor and Examine developments in the field of cryptography, particularly their implications for RISC-V, including areas such as:

    • New Algorithms

    • Protocols

    • Standards

    • Attacks

  • Define the Cryptography strategy for RISC-V to ensure compliance, efficiency, performance and robustness are state of the art.

  • Consider the need for new task groups to address requirements as they arise, and propose these to the Security HC.

  • Coordinate with other task groups and HCs, ICs

Sponsoring Organizations

These Premier and Strategic Members support this Proposal:

  1. Qualcomm

  2. Microchip

  3. SiFive


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