The RISC-V Tech Journal is a sequential log of lightweight updates with links, shared openly by all RISC-V Members, always fresh without publishing cycles, and fully traceable as a living timeline. New entries should always be added at the top so the most recent updates are immediately visible.
Entry Template
Aug 27, 2025 1–2 sentences on what happened/was achieved, [Link/Doc/PR/Notes]
This is a live doc! You can make updates instantly without having to publish!
2026
March
Mar 11, 2026 from @Bill Traynor:
RISC-V International has released and published the following documents:
Volume I: Unprivileged Specification version 20260120: PDF, HTML
Volume II: Privileged Specification version 20260120: PDF, HTML
PDF downloads are also available from the right hand navigation of the HTML document.To report issues, please navigate to the GitHub repository for the manual and open an issue.
More information for all published specifications can be found on the Technical Specifications page (link).
February
Feb 27, 2026Several committees and groups finalized their leadership for the 2026–2027 term:
Certification Steering Committee (CSC): Bilal Zafar (Chair, 10xEngineers) and Ken Dockser (Vice-chair, Tenstorrent) were elected.
CHERI SIG: Alexander Richardson (Chair, Google) and Simon Moore (Vice-chair, University of Cambridge) were elected.
ACT SIG: Jordan Carlin (Vice-chair, Harvey Mudd College) was elected.
Academic & Training SIG: Paul Sherman was elected as Chair.
Self-hosted Trace TG: Iain Robertson and Bo Gan have agreed to serve as Chair and Vice-chair.
Feb 26, 2026 RPMI v2.0 Ratification Plan Approved. The ratification plan for the RPMI Version 2.0 specification was unanimously approved by the Privileged Software HC, moving the spec forward in the ratification process.
Feb 24, 2026 TSC Charters Approval. The Technical Steering Committee (TSC) approved the charters for four new technical groups: Instrumentation Trace TG, Server SOC II TG, Vector Matrix Extension (VME) TG, and the Space SIG.
Feb 14, 2026 Version 0.10 of the Sail RISC-V Golden Model has been released, and is available at https://github.com/riscv/sail-riscv/releases.
The highlight of this release is the switch to using the C++ backend of the Sail compiler. The generated model for the hart is wrapped in a C++ class, which opens up the possibility of instantiating multiple harts to simulate multicore platforms (though this is not yet implemented).A `--config-override` option has been added to specify one or more additional JSON configuration files that override the corresponding fields in a configuration. See the README for more information.
This release adds 9 extensions and 2 unratified extensions. The unratified extensions require the `--enable-experimental-extensions` option to be activated.
More details, including updates to the configuration file and important bug fixes, are in the release notes at https://github.com/riscv/sail-riscv/blob/master/doc/ChangeLog.md#release-notes-for-version-010 .
Feb 9, 2026 psABI TG Charter Approved. The TSC vote for the new psABI TG Charter concluded with a strong majority of 20 "Approve" votes.
Feb 5, 2026 Server Platform Specification Frozen. The TSC approved the Freeze Milestone for the Server Platform Specification, clearing it to enter the Public Review phase.
Feb 2, 2026 ARC Minutes for Jan 21, 2202 published. ARC approved RHTI Packet Formats to be pursed as a Fast-Track, assigned CSR numbers for the three direct CSRs defined in the Sspmp and Sspmpen (formerly Sspmpsw) extensions, and in the process changed the names of the sspmpswitch[h] CSRs to spmpen[h], and also Unprivileged and Privileged IC chairs declared an Official Release of Volumes I and II of the ISA manual.
Feb 2, 2026 There’s a new approach to visualize our Technical Committees. It is simpler and more intuitive
As it contains Chairs’ email, its access is internal-only, for RISC-V Members. It is behind GitHub, so you must be part of the https://github.com/orgs/riscv/teams/risc-v-members to be able to see it (if you can’t reach out to help@riscv.org).
You can access the Technical Committee Explorer here. Your feedback is more than welcome.
January
Jan 30, 2026Several Calls for Candidates were issued for leadership positions (deadline Feb 14, 2026):
Server SoC II TG: Vice-Chair.
Performance Event Sampling TG: Chair & Vice-Chair.
Timing Fences TG: Chair & Vice-Chair.
Security Model TG: Chair & Vice-Chair.
CHERI TG: Chair & Vice-Chair.
Graphics SIG: Chair & Vice-Chair.
Datacenter SIG: Chair & Vice-Chair.
CHERI SIG: Chair & Vice-Chair.
UnifiedDB SIG: Vice-Chair.
Jan 29, 2026UnifiedDB Project migrated to the main RISC-V Organization at GitHub: ttps://github.com/riscv/riscv-unified-db
Jan 27, 2026 Internal review for RVA23.1 and RVB23.1 Profiles begins, ending 2026-02-11
Jan 22, 2026RISC-V Technical Session | FeNN-DMA: A RISC-V SoC for SNN Acceleration on FPGA. Feb 19, 2026 7 a.m Pacific Time. RSVP here.
Jan 21, 2026 Call for Candidates for the Certification Steering Committee Chair & Vice Chair is open and will end on Feb 4, 2026
Jan 21, 2026 Call for Candidates (Vice-Chair) for Architectural Compatibility Test (ACT) SIG is open and will end on Feb 05 2026.
Jan 20, 2026Internal Review for Branch with Immediate (Zibi) in progress. It will end on Feb 03 2026.
Jan 20, 2026Internal Review for Integer Vector Absolute Difference (Zvabd) in progress. It will end on Feb 03 2026.
Jan 19, 2026Internal Review for the Implicit Return Extension to the Enhanced Trace for RISC-V 2.0 (E-Trace) Specification in progress. It will end on Jan 23 2026.
Jan 19, 2026Internal Review for the RISC-V Worlds in progress. It will end on Feb 2, 2026.
Jan 15, 2026Dev Boards: Watching SpacemiT K3 and Tenstorrent Ascalon for RVA23 product releases. RISC-V Security safeguards and patches are landing for Spectre. Revy running on Allwinner v861).
Jan 7, 2026 ARC Minutes for Dec 23 2025 published. At its 23 Dec 2025 meeting, ARC relaxed the AIA spec to allow non-32-bit device accesses as reserved with unspecified behavior for compatibility with real bus fabrics, reviewed the RQSC ACPI fast-track for follow-up feedback, and completed triage of all remaining ISA manual issues.
Jan 6, 2026EcoSystem Lab Partners: 10xEngineers addressing bugs in github actions package, attempting to rebase commits. PLCT planning to add SpacemiT K3 to lab, expecting shipment in March. EPCC EPCC 25Q4 Lab Status Report, & Performance Tested SG2044.
2025
December
Dec 22, 2025 Week in Review: This week centered on technical governance and specification maturity, marked by a strategic pivot in the Attached Matrix Extension (AME) framework to ensure architectural flexibility, deep technical debates on speculation barriers and trace correctness, steady progress on portable SIMD and custom extension context handling, and accelerating alignment on requirements and test artifacts for the 2026 certification roadmap.
Dec 17, 2025Linux Plumbers Recordings are available here.
Dec 16, 2025 ARC Minutes for
Dec 12, 2025 Week in Review: this week centered on technical governance and specification maturity, marked by the recall of the AME data type vote to pivot toward a more flexible architectural framework, deep technical debate on speculation barriers and trace correctness, progress on portable SIMD and custom extension context handling, and accelerating alignment on requirements and test artifacts for 2026 certification.
Dec 10, 2025Qualcomm acquires Ventana.
Dec 10, 2025RISC-V Technical Session | RISC-V Technical Session | Labs, Containers and RISC-V. Dec 18, 2025, 7 a.m Pacific Time.
Dec 10, 2025Call for Candidates for VME and RVM Profile closed this week. Vote starts soon.
Dec 9, 2025 The Certification Steering Committee election for Community Member Representatives has concluded, with 8 ballots submitted out of 40 eligible voters, and using Instant Runoff Voting the two seats were awarded to David Harris (Harvey Mudd College) and Allen Baum (Individual Member), following a first-round tie and a second-round elimination of Mike Thompson (OpenHW Foundation).
Dec 5, 2025 Week in Review: ACLIC–AIA alignment and cleanup toward internal review in fast-interrupts, deepening architectural debate on Smtw/Shtw timeout semantics in ARC, launching the first draft of a CX-agnostic context save/restore framework in the composable-extensions TG, and expanding engagement across RPMI and PQC cryptography as new contributors joined the ecosystem.
Dec 4, 2025Election Results:
Space SIG: Chair: @Gianluca.Furano, European Space Agency, Vice-Chair: @Fabrizio Magugliani , E4 Computer Engineering.
Profiles SIG: Chair: @Carl Perry , Individual.
Server SOC II TG: Chair: @Vedvyas Shanbhogue , Rivos.
Long Instruction TG: Chair: @Stefan Wallentowitz , Vice-Chair: @Krste Asanovic, SiFive
Vector DSP TG: Chair @Dmitry Utyansky , Vice-Chair @Li Gaoshan , Xinsheng Technology.
Dec 3, 2025HotChips presentations are available online.
Dec 3, 2025CSC Updates: Over the past two weeks, CSC groups focused on resolving ambiguities in the ISA text, especially regarding when and how to add clarifying non-normative notes or supplemental context to normative rules, worked through cross-team questions on the ownership of specification changes, refined requirements and test-plan alignment, and continued routine governance activities including the CSC representative election.
December 3, 2025 ARC Minutes for November 25, 2025 published: ARC proposed updates to the sPMP draft and shared it with the TG for what should be a final revision, while also resolving a vector SIG issue by updating the spec to cover double-precision register-pair handling for V/Zve64d with RV32_Zdinx.
December 1, 2025 RISC V Technical Session | Programming RISC V Accelerators via Fortran. Video published.
November
Nov 30, 2025 Week in Review: tightening FP64-in-RV32 semantics in the vector SIG, consolidating documentation-governance and charter feedback in the documentation SIG, deepening the security SIG’s analysis of multi-key memory-encryption threat models, driving functional-safety white-paper readiness and SoC-level PMC scoping, reviewing the proposed Smtw/Shtw extension in ARC, and delivering updated instruction naming in the P-extension TG while formally sunsetting the tech-config TG.
Nov 26, 2025A refreshed draft of the Functional Safety SIG White Paper, featuring a new error-reporting chapter and relocating identified spec gaps to a companion document, is now open for final community review through Dec 26, 2025.
Nov 25, 2025 The Automotive SIG has completed its elections, confirming Thomas Roecker (Infineon) as Chair and electing Sam Visalli (Tenstorrent) as Vice-chair for the new term.
Nov 25, 2025 Call for Candidates for VME TG started. It will close on Dec 9, 2025.
Nov 25, 2025 Call for Candidates for the RVM Profile TG started. It will close on Dec 8, 2025
Nov 25, 2025 ARC Minutes for Nov 18, 2025 published: ARC advanced multiple items this cycle, including approving the renaming of Zvabd mnemonics, clarifying synchronization rules for xenvcfg.ADUE, refining the statement of RVWMO atomicity, directing a proposed E-trace update to proceed as a new fast-track extension, and formally approving the Zvdota and Zvbdota instruction families.
Nov 22, 2025Instrumentation Trace TG finalized leadership election this week, confirming @Jay Gamoneda as chair and electing @Robert Chyla as vice-chair.
Nov 22, 2025 Week in Review: This week working groups advanced several key threads: launching a scheduling survey for the new Attached Matrix Extension TC, iterating on a G-stage Dirty Log proposal for the RISC-V IOMMU (ping-pong buffers, sizing and event semantics) in the hypervisor/datacenter SIGs, debating trace back-pressure, trRamStopOnWrap behavior and the need for a global cross-triggering fabric in the debug/trace SIG, exploring how to validate VLEN-portable code and emulate intrinsics across implementations in the vector SIG, and kicking off focused review of the draft RVM23 profile’s mandatory vs optional extensions in tech-RVM.
Nov 22, 2025 A survey is now available to determine the most suitable meeting time slot for the Attached Matrix Extension Technical Committee. All active participants are invited to submit their preferred option by November 30, 2025, using this link: https://www.surveymonkey.com/r/K2RCK3K.
Nov 15, 2025 Week in Review: This week’s RISC-V ecosystem chatter spanned security-SIG scheduling alignment, segment-driven ISA requirement debates, documentation-template streamlining, vector-extension time-slot coordination, and governance updates including Performance Analysis SIG chair re-elections and the QoS SIG’s meeting-cadence kickoff.
Nov 14, 2025High Assurance Crypto TG: the Vice-Chair election concluded confirming Roberto Avanzi as the new Vice-Chair.
Nov 13, 2025The TSC’s OpaVote on the Unified Database TG Charter closed with 21 ballots cast, delivering a majority of 20 approvals, surpassing the required threshold and formally approving the UDB SIG charter. The SIG will be brought back to TSC in 6 months for an update on its progress (around May 2026).
Nov 11, 2025 ARC Minutes for Nov 4, 2025 published. An updated SPMP spec and related fast-track extensions (including SPMP-for-Hypervisor, CFI shadow-stack items, Supervisor Domains, and a rewritten Ziccid proposal) were reviewed, with targeted restructuring, follow-on feedback, and a request for a ratification plan to align software PoCs and ecosystem readiness.
Nov 10, 2025You can now run the RISC-V Sail model without installing Sail, Z3, or Opam, simply download the latest binary release from the riscv-sail-riscv repository and run it with no additional dependencies.
Nov 7, 2025 Week in Review: This week’s RISC-V mailing list discussions centered on detailed review of the Ssgeien extension in the privileged spec, proposed standards for documentation and CSR formatting, and coordination around performance-modeling workflows.
Nov 7, 2025 Ratification Plan unanimously approved (21–0–0) advancing RVA23.1 (RVS-4180) and RVB23.1 (RVS-4184) Fast Tracks, now actively in development.
Nov 3, 2025 Heads-up on RISC-V Meetings and Encumbered Information.
Nov 3, 2025 Call for Candidates for the Long Instruction TG is open. It will close on Nov 17th 2025.
October
Oct 31, 2025Call for Candidates for the Vector Digital Signal Processing TG started. It will be open until Nov 14, 2025.
Oct 31, 2025 Week in Review: Unified Database SIG discussed fixes to issues #730/#848 and regeneration of the profiles spreadsheet; Fast Interrupts TG discussed implementing late preemption and tail chaining in software; Attached Matrix Extension TG discussed data types, tile and accumulator shapes; ARC reviewed CHERI extension organization, Zvbc32e and Zvkgs specs, Server Platform, SPMP, and Supervisor Domains.
Oct 30, 2202 ARC Minutes for Oct 2, 2025 published. The ARC engaged with the CHERI TG at the RISC-V Summit to refine CHERI extension organization, base ISA and naming considerations, advanced the Zvbc32e and Zvkgs specs toward approval, provided recommendations on Server Platform ISA behavior for thread/VM migration, and began reviewing the latest SPMP and Supervisor Domains drafts.
Oct 30, 2025RISC-V Technical Session | Programming RISC-V accelerators via Fortran will be help on Nov 27, 2025, 7 a.m Pacific Time. Register here.
Oct 29, 2025Call for Candidates for the Profiles SIG started. It will be open until Nov 12, 2025.
Oct 29, 2025ARC Minutes for Oct 14, 2025 published. The ARC approved the Smpmpmt PMP-based Memory Types extension pending cosmetic edits, advanced the Zvzip fast-track with new nomenclature aligned to Packed SIMD P and scalar crypto, and green-lit the Zvfbfa and Zvfofp8min fast-track based on sufficient altfmt extensibility. The committee also queued SPMP for upcoming review and initiated evaluation of the Zvdota and Zvbdota dot-product fast-tracks, with continued analysis planned.
Oct 29, 2025 https://www.youtube.com/watch?v=p5Je_FxIXts
Oct 28, 2025 Week in Review: RISC-V Summit North America 2025, presentations attached to Sched. Some photos available here.
Oct 28, 2025Call for Candidates for the Space SIG started. It will be open until Nov 10, 2025.
Oct 28, 2025The Technical Steering Committee successfully concluded its vote to approve the updated RPMI TG Charter, with 19 ballots cast and an outcome of 18 approve, 1 abstain, and 0 objections, surpassing the required majority.
Oct 18, 2025 Week in Review: Discussions centered on certification test coverage (CSC WG), hypervisor dirty-log tracking refinements and hardware-assisted PTE clearing, new fast-track proposals for S-mode memory protection and M-mode shadow stacks, coordination of crypto and security sessions ahead of the RISC-V Summit NA, and several TG meeting cancellations due to Summit preparations.
Oct 17, 2025The Technical Steering Committee has officially approved the Crypto SIG Charter with unanimous support (19 votes in favor, 0 objections, 0 abstentions).
Oct 16, 2025 Version 0.9 of the sail-riscv model has been released. Highlights include support for many new extensions (including the E base and BFloat16 extensions), PMA and memory map configuration, and a binary release of the simulator supporting other architectures. See the changelog for full release notes.
Oct 14, 2025CSC-wide meeting minutes published; The meeting focused on reviewing and approving the Test Plan Working Group's charter, which was successfully approved with a quorum of 11 out of 13 voters present.
Oct 14, 2025Call for Candidates | Vice-Chair, for the the High Assurance Cryptography Task Group has started and will close on Oct 28, 2025.
Oct 14, 2025Leadership swap for the High Assurance Cryptography Task Group (https://riscv.atlassian.net/browse/RVG-145). @Ruud Derwig from Synopsys is taking the Chair position, replacing @G. Richard Newell, effective immediately.
Oct 14, 2025The Call for Participation, Voters, and Observers for the Vector Digital Signal Processing TG has started and will close on Oct 28, 2025.
Oct 13, 2025Mailing list for the Vector Digital Signal Processing TG is now available.
Oct 13, 2025 Support for the Zvfbfwma extension has been added to the Sail model.
Oct 9, 2025Call for Candidates for the Server SoC II is in progress and will end on Oct 23, 2025.
Oct 9, 2025 Support for the Zvfbfmin extension has been added to the Sail model.
Oct 9, 2025The JITed and Dynamic Languages SIG confirmed Martin Maas (Google) as Chair and Adam Zabrocki (NVIDIA) as Vice-Chair, following unanimous approval in the recent elections.
Oct 7, 2025 Support for static PMAs has been added to the Sail model.
Oct 7, 2025 The internal review period for the RISC-V Quality of Service Controllers Table (RQSC) ACPI Specification has started. The two-week review will end on Oct 21, 2025.
Oct 6, 2025The Branch with Immediate Fast Track Extension got the approval from its Governing Committee (the Unprivileged ISA), for the Development Complete milestone.
Oct 3, 2025 ARC Minutes for Sep 30, 2025 published: This week’s ARC activity included receipt of an updated CHERI specification, continued Supervisor Domains review including discussion of the optional Ssgeien extension, a resolution proposal on MSI PTE caching in the IOMMU specification, and the start of Zvfbfa/Zvfofp8min and Zvldot/Zvbdot fast-track reviews.
Oct 3, 2025 Week in Review: mailing lists this week covered discussions on VME behavior, CSR access and mtime writability, CHERI profile governance, Datacenter persistence flush extensions, AI/ML scope definition, Server SoC planning, documentation tooling, debug process alignment, and matrix extension design feedback.
Oct 3, 2025The vote on the Advanced Core-Local Interrupt Controller Spec concluded with 4 of 5 ballots cast; the majority threshold was not met (1 Approve, 3 Object), so the spec was not approved and will return to the authors and Privileged IC Chairs for revision.
Oct 2, 2025TSC has started voting on the Crypto SIG Charter via OpaVote, running through October 16, 2025.
Oct 2, 2025TSC has approved the Load-Acquire/Store-Release (Zalasr) Fast Track Extension (18–0–0), clearing it for submission to the Board for final ratification in October.
Oct 1, 2025David Harris (Harvey Mudd College) was elected Chair and Adnan Hamid (Breker Verification Systems) Vice-Chair in the first CSC Test Plan Work Group elections.
September
Sep 30, 2025 ARC Meeting Minutes for Sep 23, 2025 published. The ARC approved the Svukte extension, provided clarification guidance to the RPMI authors, engaged with the CHERI TG ahead of next month’s in-person meeting, initiated review of the Ziccid specification in consultation with the JITed and Dynamic Languages SIG, and continues steady review of the Supervisor Domains spec toward its next iteration.
Sep 28, 2025 Support for the Zicfilp extension has been added to the Sail model.
Sep 26, 2025 Week in Review: mailing lists this week included discussion on the Integrated Matrix Extension “Option G” figure generator (clarifications on “L (elements/VR)” and LMUL/widening) in tech-integrated-matrix-extension; an internal review/PR for the Hart-to-Trace Interface (RHTI) in sig-debug-trace-perf-mon and soc-infra; a proposed charter revision in sig-documentation; a BLIS retreat notice in sig-ml-ai-apps (cc: sig-hpc); a Summit NA flyer share in tech-ops-meeting; and membership updates in tech-vme.
Sep 25, 2025 Vector Digital Signal Processing TG was approved by the BoD.
Sep 24, 2025 ARC Meeting Minutes for Sep 16, 2025 published. Reviews continued on Supervisor Domains and the SPMP draft, Zvzip was deferred to 9/23, and ARC provided feedback to the Scalar Efficiency SIG on potential Fast Track candidates.
Sep 24, 2025RISC-V Technical Session | Microarchitecture-Aware Custom RISC-V Instruction Design will be held on Oct 9, 2025. Register here.
Sep 23, 2025Internal Review started for PMP-based Memory Types Fast Track Extension. It ends on Oct 8, 2025.
Sep 23, 2025The PMP-based Memory Types Fast Track Extension completed its Development milestone.
Sep 23, 2025The RQSC Table Specification completed its Development Complete milestone.
Sep 22, 2025Call for Candidates for Automotive SIG started. It will end on Oct 6, 2025.
Sep 22, 2025Concluding today, the AME Task Group approved (17–1, with 1 abstention) the proposed package of instructions, covering memory load/store, element-wise operations, and matrix-matrix multiplication, after a one-week OpaVote ballot, confirming broad support for advancing the Attached Matrix Extension (AME).
Sep 19, 2025Call for Candidates for Instrumentation Trace started. It will end on Oct 3, 2025.
Sep 19, 2025 Developer Board Program application forms added for Milk-V Megrez (limited availability), ESWIN EBC77, Banana Pi F3, Orange Pi RV2.
Sep 19, 2025 Development Board Minutes for Sep 18, 2025Published. Watching Milk-V Titan launch for October 15th, expecting a board to be present at NA Summit Developer Zone. Reviews of BSD, Arch Linux, Gentoo, and Fedora-V Force.
Sep 19, 2025 CSC Week in Review: discussions spanned TPWG charter finalization and governance on csc, certification test-plan mechanics on csc-test-plan (ECALL → JAL handlers, continue-on-failure, golden-model outputs), plus requirements and coordination updates on csc-requirements and csc-leads.
Sep 19, 2025 Week in Review: mailing lists this week included discussions on VME accumulator counts, mtime writability and platform terminology, CHERI profile handling in governance, persistence flush extensions in Datacenter SIG, performance-events taxonomy and sampling, AI/ML scope in AME, tooling and DCO checks in Documentation/UnifiedDB, Server SoC agenda and planning, and matrixes for compliance and coverage.
Sep 19, 2025 RVM Profile TG started its Call for Participation. It will end on Oct 3, 2025.
Sep 17, 2025 ARC Minutes for Sep 9, 2025Published. Reviews continued on Smmpt and Supervisor Domains, ARC began assessing a new CHERI draft ahead of in-person discussions at the North American Summit, and feedback was provided on the improved Zvzip draft.
Sep 16, 2025 ARC Minutes for Sep 2, 2025 Published. Supervisor Domains, IOPMP, and SPMP reviews continued this week, with ARC feedback focusing on reducing optionality in the IOPMP spec and suggesting some content be moved to a white paper.
Sep 15, 2025CLIC has received Technical Committee approval, confirming specification development is complete. It now proceeds to Governing Committee approval. Once approved, the specification moves into stabilization.
Sep 15, 2025Server Platform Specification is now Stable and moves into working on Freeze. Approval details available at https://riscv.atlassian.net/browse/RVS-4160 .
Sep 12, 2025RISC-V Technical Session | TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based Cryptography. Video available on YouTube.
Sep 12, 2025 Week in Review: mailing lists this week included RHTI fast-track proposals, trace state handling, and spec versioning, fast-track requests for new addressing modes, and CSC requirements, test plan activities, RVCP operational definitions, and leadership coordination.
Sep 10, 2025 TSC approved the Proposal of Work for the Vector Digital Sign TG. BoD approval is scheduled for Sep 25, 2025.
Sep 9, 2025 TSC elections concluded. @Greg Favor (Unlicensed) elected Chair and @Philipp Tomsich elected Vice-Chair.
Sep 9, 2025Event Trace TG elections concluded. @Bruce Ableidinger elected Chair and @Boris Shulman elected Vice-Chair.
Sep 8, 2025 Spec Plan Editor update. Start From, Task Dependency and Three-Point Estimates added.
Sep 8, 2025Public Review Period ended for Load-Acquire/Store-Release (Zalasr).
Sep 5, 2025 Week in Review: mailing lists this week included discussions on VME accumulator counts, mtime writability and platform terminology, CHERI profile handling in governance, persistence flush extensions in Datacenter SIG, performance-events taxonomy and sampling, AI/ML scope in AME, tooling & DCO checks in Documentation/UnifiedDB, and Server SoC agenda/planning.
Sep 5, 2025 All Disclosures are updated.
Sep 4, 2025TSC Gap Analyses Published.
Sep 3, 2025RISC-V Technical Session | Tensor Program Optimization for the RISC-V Vector Extension. Video available on YouTube.
Sep 3, 2025The RVA23.1 and RVB23.1 profiles were admitted to follow the fast track process. Both are now under Planning.
Sep 3, 2025 ARC Meeting Minutes for 2025-08-26 Published. The ARC clarified that MPTE/MTE bit updates in the tcontrol CSR by the Snrnmi extension are invisible to M-mode debugging (to be noted non-normatively in the spec), approved fast-track RVA23.1/RVB23.1 with Ssctr guidance, continued SPMP and Supervisor Domains reviews, and recommended CTR/Svadu as optional and Zkr as mandatory in the draft Server Platform spec.
Sep 3, 2025Internal Review period for RISC-V Internal Review: Zvfbfa and Zvfofp8min, Zvldot and Zvbo, and Ziccid ended without any feedback. Specifications move to Freeze.
Sep 3, 2025libiopmp v0.1.0 was released under the IOPMP TG GitHub repo, an extensible driver supporting the latest IOPMP spec v0.8, multiple models/configurations, and reference programs for easy testing and feedback.
Sep 3, 2025 The Smpmpmt Fast Track extension has been approved for the Ratification Plan milestone.
Sep 3, 2025 The Integer Vector Absolute Difference Extension has been approved for the Ratification Plan milestone.
Sep 2, 2025 IOPMP Specification update: alignment on simplifying the IOPMP spec by keeping a streamlined core in the standard while moving complex options and guidance into application notes, with @Channing Tang and @Paul Ku leading the review and ARC engaged for iterative feedback.
Sep 1, 2025 Next RISC-V Technical Session published: TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based Cryptography. Sep 11, 2025, 7 a.m Pacific Time.
Sep 1, 2025 Call for Participants, Voters and Observers for Long Instruction TG ended.
Sep 1, 2025 psABI elections concluded: @Kito Cheng elected Chair and @Jessica Clarke elected Vice-Chair.
Sep 1, 2025 Sail Development Highlights
Support for the Zihintntl and Zihintpause extensions has been added.
Sep 1, 2025 Call for Participation for the Instrumentation Trace started.
August
Aug 29, 2025Attached Matrix Extension TG have defined the date for its extra meetings, it will on 10PM GMT+8, Sept 3 (Wednesday) | 7AM PDT, Sept 3 (Wednesday). It will show up at https://tech.riscv.org/calendar. Reach out to @Siqi Zhao if need be.
Aug 28, 2025ARC Meeting Minutes Published. The ARC continued reviews on CHERI, Supervisor Domains, SPMP, and IOPMP, clarified questions on Zihintitl/Zca and menvcfg behavior, and admitted Zvzip as a fast-track extension candidate.
Aug 28, 2025 @Ken Dockser reported that the the Governance Committee clarified the meeting attendance conundrum:
All scheduled meetings count (unless cancelled ahead of time), even if quorum isn’t reached.
If you attend, you get credit.
If you don’t attend, it counts against you.
Aug 28, 2025 PTE Reserved-for-Software Bits 60-59 Fast Track ISA,
PTE Reserved-for-Software Bits 60-59 Fast Track IOMMU and
Boot and Runtime Services (BRS) were Ratified by the Board of DirectorsAug 28, 2025 RVM TG and Instrumentation Trace TG were approved by the Board of Directors.
Aug 27, 2025 Crypto SIG elections concluded: @Markku-Juhani Saarinen elected Chair, @Nicolas Brunie elected Vice-Chair.
Aug 26, 2025 Meeting Disclosures in Chinese are now available here.
Aug 26, 2025 RISC-V Tech Journal was created.