2026-02-04 TSC Meeting
Date
Feb 4, 2026
Disclosures
Participants
Agenda
We are tight on time - 125 min in the current agenda.
Minutes Approval
Announcements
Changes
Ventana joined Qualcomm
Rivos joined Meta
Intel no longer a member
New voting members:
Robin Maffeo - Microsoft
Ved Shanbhogue - Meta
Charter Review
Operations
Presentations
None
Votes
Notes & Action Items
Meeting recording and transcript: link
Meeting Summary
TSC Membership Status
The RISC-V Technical Steering Committee (TSC) meeting began with introductions and updates on voting members, including the addition of Robin Maffeo from Microsoft and Ved as a voting member due to his role as chair of the SOC Infrastructure HC.
Space SIG Charter Presentation
The topic focused on the charter for the Space Special Interest Group (SIG), with Gianluca providing background on the need for RIS-V as an open standard backbone for next-generation space computing. He explained the objectives, which include developing a new ISA specification, conducting a comprehensive survey of radiation-hardened-by-design and AI extensions, and identifying gaps in the software ecosystem. The SIG aims to assess technical gaps and highlight them to RIS-V International, with deliverables including a gap analysis report and a white paper on space security. Fabrizio noted the quick consensus reached on the charter, and Jeff mentioned the next step would be an open vote to approve the charter by the TSC.
Server SoC II Charter Presentation
Ved presented a charter review for a server SOC Task Group (TG), outlining objectives to develop a server SOC specification 1.1, create a test specification, develop a test infrastructure, and establish a test suite. The group discussed potential confusion with version numbering in the test specification and agreed to clarify documentation. Jeff announced that the charter would be put to an official vote in the coming weeks. Ved emphasized the importance of member contributions to the task group's large charter, particularly in test suite development.
Vector Matrix Extension (VME)
Greg presented the Vector Matrix Extension (VME) TG charter that was similar to a previously approved proposal.The discussion included details about different matrix extension approaches (IME, VME, and AME) and their objectives, with VME focusing initially on AIML applications while leaving room for future HPC and DSP extensions.
The discussion focused on the relationship between VME and IME, with Guy expressing concerns about the potential for ecosystem fragmentation due to their similar but distinct approaches to matrix extensions. Greg and others explained that while there are fundamental differences in architecture and performance capabilities, particularly regarding accumulator tiles and register usage, there are ongoing efforts to create a shared API that could accommodate both approaches. The group acknowledged that while integration might be possible, it could extend the specification timeline, and Derek noted that RISC-V is already behind schedule for matrix extensions.
The discussion focused on the challenges and potential for aligning the IME and VME matrix extensions, with Guy proposing that the charter be augmented to explore architectural similarities and integration between the two approaches. Greg and Philipp highlighted the fundamental differences between IME and VME, noting that unifying them could be difficult in practice. The group agreed that the TSC would need to decide whether to continue VME as is or force IME to unify the two approaches, with Greg emphasizing that the current charter would be put to an approval vote. The conversation ended with a brief mention of the RISE collaboration, which is still in early stages as it awaits finalized extension specifications.
Vector Digital Signal Processing (DSP) TG Charter Presentation
Dmitry and Gaoshan presented the charter for Vector DSP. Krste has provided some feedback that needs to incorporated. Discussion occurred around Krste’s feedback. Updates will be made to the charter, then the TSC chairs will determine next steps of either a TSC review by email or the final vote.
Instrumentation Trace Charter Presentation
Jay and Robert presented the Instrumentation Trace Charter which has been under development for a year. No questions were asked. The group agreed to proceed to vote.
TSC Participation Tracking Proposal
The group discussed how Jeff should report information to help TSC members track their participation. The group was comfortable with Jeff presenting information to the TSC only, reflecting their participation in the 3-month sliding window. No warning emails outside of the policy will be sent. Jeff will gladly answer questions if members want details.
SIG Status Reports Summary
Rafael has collected SIG status and summarized the groups. He will work with the IC/HC Chairs to evaluate progress. SIG reviews by TSC will likely be scheduled in the coming months to finalize recommendations.
Task Group Extension Status
Work continues with HC/IC chairs for the TGs needing extensions. TSC will get votes once complete.
Outlook for 2026 Ratifications
Detailed Minutes
Space SIG
May appear niche market but opportunity is great.
Work is going very well
Agreed to proceed to vote
Server SOC II
Could we version the test specification (1.0) testing version (1.1) consistently?
Rules will specify which version.
If we name 1.1 specification, then we don’t have a 1.0.
Please ensure that specification is clear.
Do we have a process for having vertical SIGs to provide input into Server SOC?
Will list Space SIG as stakeholders.
Please consider joining and contributing.
Agreed to proceed to vote
Vector Matrix Extension (VME)
Charter largely unchanged
How much overlap is there between IME and VME, can we converge?
Answer: The ISA details are quite different. The new accumulator register state allows greater performance than can be achieved with IME constraints of existing.Can we base VME on IME instead of base Vector?
Answer: The differences are difficult to overcome.Observation is that matrix is taking a long time to complete and the needs are urgent.
Work is underway to try and create common software APIs (Vector SIG).
Discussion about the binary compatibility of applications occurred without agreement as to whether it was feasible to accomplish this by converging the two designs.
Proposal to add the clause requiring the analysis to prove the convergence works or does not work. It was not accepted.
lambda=1 of IME makes the arguments look similar to VME.
For implementors of IME, developing some (as in: binary compatibility, not necessarily highly optimised) VME support in the same silicon should be a low-hanging fruit.
For a VME implementor, some aspects of IME will be challenging.
On the other hand with large VLEN you can't afford to build something like VME, the accumulator panel looks too large.
Explicit accumulator tiles in IME make register allocation easier.
How is the group working with RISE? What did they commit to?
Answer: Nothing committed yet from RISE. Intent was the engage RISE after ratified extension.Group agreed to proceed to vote.
Vector Digital Signal Processing Charter Presentation
Krste has submitted feedback via email which will be considered. Some text updates are likely.
For embedded applications, are we assuming full RVV capabilities?
Answer: Vector does not need FP support.Can we widen without additional resources?
Answer: that is being discussed.Recommend awaiting updates from Krste’s comments and then quick re-review by TSC chairs who will decide how to proceed.
Instrumentation Trace Charter Presentation
No additional discussion.
Group agreed to proceed to vote.
TSC Participation Tracking Proposal
Are you comfortable with my sharing your voter participation percentage with the whole TSC (only, not public)?
Yes, but percentages only, for sliding window
Would it be helpful for me inform you of actions you need to take to avoid probation, e.g. vote or attend a meeting?
Not needed due to policy warning. But, Jeff will always answer specific questions.
RISC-V Staff is looking at some new tooling which may improve voting
